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Quantum Computing Systems Research Group

Our Focus

Verification
Checking a quantum circuit or program against a pre-/post-condition specification, or searching it for bugs, without ever enumerating individual quantum states.
Simulation
Symbolic execution over MTBDDs with loop summarization, so a repeated block of gates is analysed once rather than unrolled.
Foundations
The automata and logic underneath: tree automata and their level-synchronized extension, omega-automata, logic and SMT solving.

Latest News

Parameterized verification of quantum circuits accepted at POPL'26

2025.11.10 publication

The paper “Parameterized Verification of Quantum Circuits” was accepted at POPL'26 in Rennes, France, to appear in PACMPL 10 (POPL).

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Quantum circuit verification in Communications of the ACM

2025.05.29 publication

The paper “An Automata-Based Framework for Verification and Bug Hunting in Quantum Circuits” appeared in the June 2025 issue of Communications of the ACM, volume 68 issue 6, pages 85–93.

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Quantum program verification accepted at TACAS'25

2024.12.23 publication

The paper “AutoQ 2.0: From Verification of Quantum Circuits to Verification of Quantum Programs” was accepted at TACAS'25 in Hamilton, Canada. It extends AutoQ from verifying quantum circuits to verifying quantum programs.

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